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ComponentType Structure for Bare Module

Notice

Page generated: 2023-06-01

See source code here

For updates/fixes contact: wraightATcern.ch

Tables generated from PDB componentType data-strucutre

Types

name code existing
Single bare module SINGLE_BARE_MODULE True
Dual bare module DUAL_BARE_MODULE True
Quad bare module QUAD_BARE_MODULE True
Digital single bare module DIGITAL_SINGLE_BARE_MODULE True
Digital quad bare module DIGITAL_QUAD_BARE_MODULE True
Dummy single bare module DUMMY_SINGLE_BARE_MODULE True
Dummy quad bare module DUMMY_QUAD_BARE_MODULE True
Tutorial bare module TUTORIAL_BARE_MODULE True

Properties

name code description required
FE chip version FECHIP_VERSION True
Sensor Type SENSOR_TYPE True
Thickness of FE chips (RD53A) THICKNESS False
Vendor code VENDOR Vendor code used for (pre-)production. True

Flags

name code
Inner pixel PI

Stages

Table

name code order alternative initial final
Bare module assembly BAREMODULEASSEMBLY 0 False True False
Bare module failed test, needs investigation UNHAPPY 1 True False False
Not to be used for the detector NOT_USED 2 True False False
Reception at ITk institute BAREMODULERECEPTION 3 False False False
Bare module to module PCB assembly MODULE/ASSEMBLY 4 False False False
Wire Bonding MODULE/WIREBONDING 5 False False False
Initial Warm MODULE/INITIAL_WARM 6 False False False
Initial Cold MODULE/INITIAL_COLD 7 False False False
Parylene Masking MODULE/PARYLENE_MASKING 8 False False False
Parylene Coating MODULE/PARYLENE_COATING 9 False False False
Parylene Unmasking MODULE/PARYLENE_UNMASKING 10 False False False
Post-Parylene Warm MODULE/POST_PARYLENE_WARM 11 False False False
Post-Parylene Cold MODULE/POST_PARYLENE_COLD 12 False False False
Wirebond Protection (alt) MODULE/WIREBOND_PROTECTION 13 True False False
Thermal Cycles MODULE/THERMAL_CYCLES 14 False False False
Long Term Stability Test MODULE/LONG_TERM_STABILITY_TEST 15 False False False
Final Warm MODULE/FINAL_WARM 16 False False False
Final Cold MODULE/FINAL_COLD 17 False False False
Modules failed test, needs investigation MODULE/UNHAPPY 18 True False False
Module Complete MODULE/COMPLETE 19 False False True

Mermaid Diagram

flowchart LR subgraph Production Stages subgraph "Bare module assembly" a1["code: BAREMODULEASSEMBLY"] a2["tests: "] end subgraph "Bare module failed test, needs investigation (alternative)" b1["code: UNHAPPY"] b2["tests: "] end subgraph "Not to be used for the detector (alternative)" c1["code: NOT_USED"] c2["tests: "] end subgraph "Reception at ITk institute" d1["code: BAREMODULERECEPTION"] d2["tests: Visual Inspection Mass Measurement Quad Bare Module Metrology Flatness Sensor IV on bare module "] end subgraph "Bare module to module PCB assembly" e1["code: MODULE/ASSEMBLY"] e2["tests: "] end subgraph "Wire Bonding" f1["code: MODULE/WIREBONDING"] f2["tests: "] end subgraph "Initial Warm" g1["code: MODULE/INITIAL_WARM"] g2["tests: "] end subgraph "Initial Cold" h1["code: MODULE/INITIAL_COLD"] h2["tests: "] end subgraph "Parylene Masking" i1["code: MODULE/PARYLENE_MASKING"] i2["tests: "] end subgraph "Parylene Coating" j1["code: MODULE/PARYLENE_COATING"] j2["tests: "] end subgraph "Parylene Unmasking" k1["code: MODULE/PARYLENE_UNMASKING"] k2["tests: "] end subgraph "Post-Parylene Warm" l1["code: MODULE/POST_PARYLENE_WARM"] l2["tests: "] end subgraph "Post-Parylene Cold" m1["code: MODULE/POST_PARYLENE_COLD"] m2["tests: "] end subgraph "Wirebond Protection (alt) (alternative)" n1["code: MODULE/WIREBOND_PROTECTION"] n2["tests: "] end subgraph "Thermal Cycles" o1["code: MODULE/THERMAL_CYCLES"] o2["tests: "] end subgraph "Long Term Stability Test" p1["code: MODULE/LONG_TERM_STABILITY_TEST"] p2["tests: "] end subgraph "Final Warm" q1["code: MODULE/FINAL_WARM"] q2["tests: "] end subgraph "Final Cold" r1["code: MODULE/FINAL_COLD"] r2["tests: "] end subgraph "Modules failed test, needs investigation (alternative)" s1["code: MODULE/UNHAPPY"] s2["tests: "] end end subgraph Final Stages subgraph "Module Complete" t1["code: MODULE/COMPLETE"] t2["tests: "] end end

Relatives

Parents

type: SINGLE_BARE_MODULE

name code
Module MODULE
Module MODULE
Module MODULE
Module MODULE

type: QUAD_BARE_MODULE

name code
Module MODULE
Module MODULE

type: DUAL_BARE_MODULE

name code
Module MODULE

type: DIGITAL_SINGLE_BARE_MODULE

name code
Module MODULE
Module MODULE
Module MODULE

type: DIGITAL_QUAD_BARE_MODULE

name code
Module MODULE
Module MODULE

type: DUMMY_SINGLE_BARE_MODULE

name code
Module MODULE
Module MODULE
Module MODULE

type: DUMMY_QUAD_BARE_MODULE

name code
Module MODULE
Module MODULE

type: *

name code
OB Loaded Module Cell OB_LOADED_MODULE_CELL
Bare module gel pack GELPACK
Bare module gel pack GELPACK

type: TUTORIAL_BARE_MODULE

name code
Module MODULE

Children

type: SINGLE_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: DUAL_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: QUAD_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: DIGITAL_QUAD_BARE_MODULE

name code
Front-end Chip FE_CHIP

type: DUMMY_SINGLE_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: DUMMY_QUAD_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: TUTORIAL_BARE_MODULE

name code
Front-end Chip FE_CHIP
Sensor Tile SENSOR_TILE

type: DIGITAL_SINGLE_BARE_MODULE

name code
Front-end Chip FE_CHIP